MUSIC Direction-of-Arrival FPGA IP Core
Hardware-accelerated MUSIC (Multiple Signal Classification) for high-resolution Direction-of-Arrival estimation on AMD/Xilinx FPGAs.
EVALUATION
For functional evaluation and FPGA integration testing.
The evaluation core is verified against an independent Python floating-point MUSIC reference using deterministic single- and two-source ULA scenarios. For each scenario, the same covariance matrix is processed by the Python model and the Vitis HLS implementation.
The upper plot compares the normalized MUSIC pseudospectra from Python and HLS for a representative two-source case, including the true target directions. The dashed curve shows the point-by-point absolute error of the MUSIC denominator.
The lower plot summarizes numerical agreement across the signal validation scenarios using the RMSE of the MUSIC denominator between Python and HLS. Lower values indicate closer agreement.
IP Core Features
1D ULA processing
Floating-point implementation
Full angular spectrum computation (512 directions)
MUSIC subspace-based DoA estimation
Runtime source count (K = 1 or 2)
Real-valued EVD with unitary transformation
Python API/application
C application for Linux and bare-metal
Vivado integration example
Implementation Results
XC7Z020-1CLG400C, 100 MHz target clock
DSP slices: 24 / 220 (10.9%)
LUTs: 10,255 / 53,200 (19.3%)
FFs: 13,081 / 106,400 (12.3%)
BRAM: 19 / 140 (13.6%)
Latency: 41,861 cycles (~419 µs)
Initiation Interval: 41,862 cycles (~419 µs)
PRO
A reference implementation for commercial deployment, customizable to application-specific architecture and performance requirements.
The Pro core is verified against an independent Python floating-point MUSIC reference using deterministic 2D URA scenarios with up to four sources, a shared source-count parameter K, and two runtime-configurable regions of interest (ROIs).
The left plots show the MUSIC pseudospectrum within both ROIs for a representative two-source scenario, including the true source positions and HLS-estimated DoAs. Stronger responses correspond to minima of the MUSIC denominator.
The right plot summarizes the numerical agreement between the fixed-point HLS implementation and the floating-point Python reference using the RMSE of the MUSIC denominator over the evaluated samples in both ROIs. Lower values indicate closer agreement.
IP Core Features
2D URA processing (4×4, 16 RX)
Fixed-point implementation
Subspace-based MUSIC DoA estimation
Runtime-configurable Regions of Interest (ROIs)
128 × 128 azimuth/elevation angular grid
Global source count (K = 1–4)
Real-valued 16 × 16 EVD
IP-core runtime status and statistics
Python API/application
C application for Linux and bare-metal
Vivado integration example
Implementation Results
XC7Z020-1CLG400C, 100 MHz target clock
DSP slices: 71 / 220 (32.3%)
LUTs: 9,353 / 53,200 (17.6%)
FFs: 9,945 / 106,400 (9.3%)
BRAM: 86 / 140 (61.4%)
Latency: 371,780 cycles (~3.72 ms, maximum 16 × 16 ROI)
Initiation Interval: 371,781 cycles (~3.72 ms)
